menuconfig HPCIE
	bool "Huanglong PCIe controller"
	depends on ARCH_S40 || ARCH_T9 || ARCH_WUDANGSTICK || ARCH_SHAOLINGUN || ARCH_KONGTONGV100 || ARCH_HENGSHANV200 || ARCH_EMEISWORD
	select PCIEPORTBUS
	select PCI_MSI if (ARCH_WUDANGSTICK || ARCH_SHAOLINGUN || ARCH_KONGTONGV100 || ARCH_HENGSHANV200A || ARCH_EMEISWORD)
	select PCI_MSI_IRQ_DOMAIN if (ARCH_WUDANGSTICK || ARCH_SHAOLINGUN || ARCH_KONGTONGV100 || ARCH_HENGSHANV200 || ARCH_EMEISWORD)
	select PCIE_DW
	select PCIE_DW_HOST
	select PCIE_DW_PLAT
	select PCI
	help
	  Say Y here if you want PCIe controller support on SOCTP05 SoC

if ARCH_WUDANGSTICK || ARCH_SHAOLINGUN || ARCH_KONGTONGV100 || ARCH_HENGSHANV200 || ARCH_EMEISWORD

config PCIE0_PME_IRQ
	hex "Huanglong pcie pme interrupt number"
	default "0xa2"	if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0xa2"  if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE0_DMA_ADDR_READ
	hex "huanglong pcie dma read address"
	default "0x10000000" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x10000000" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE0_DMA_SIZE_READ
	hex "huanglong pcie dma read size"
	default "0x0" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x0" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE0_DMA_ADDR_WRITE
	hex "huanglong pcie dma write address"
	default "0x10000000" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x10000000" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE0_DMA_SIZE_WRITE
	hex "huanglong pcie dma write size"
	default "0x0" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x0" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE1_PME_IRQ
	hex "Huanglong pcie1 pme interrupt number"
	default "0xa2"	if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0xa2"  if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE1_DMA_ADDR_READ
	hex "huanglong pcie1 dma read address"
	default "0x10000000" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x10000000" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE1_DMA_SIZE_READ
	hex "huanglong pcie1 dma read size"
	default "0x0" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x0" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE1_DMA_ADDR_WRITE
	hex "huanglong pcie1 dma write address"
	default "0x10000000" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x10000000" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

config PCIE1_DMA_SIZE_WRITE
	hex "huanglong pcie1 dma write size"
	default "0x0" if (ARCH_WUDANGSTICK || ARCH_KONGTONGV100 || ARCH_EMEISWORD)
	default "0x0" if (ARCH_SHAOLINGUN || ARCH_HENGSHANV200)
	depends on HPCIE

endif
